BCOS 80x86 Include FilesProject Map
80x86 Kernel CPU Feature Flags Include File
File: 80x86/inc/kernel/cpufeatk.inc
 

Copyright © Brendan Trotter 2008

This material is provided by Brendan Trotter as a service to interested parties on an "as-is" basis, for informational purposes only. Brendan Trotter assumes no responsibility for any errors or omissions. Brendan Trotter does not make, and expressly disclaims any, representations or warranties, express or implied, regarding this web page and the host web site, including, without limitation, any implied warranties of merchantability or fitness for a particular purpose.

Under no circumstances shall Brendan Trotter, or any associated contributors, volunteers or representatives be liable for any damages, whether direct, indirect, special or consequential damages for lost revenues, lost profits, or otherwise, arising from or in connection with this web page, the host web site, or the materials contained herein.

All materials contained in these files are protected by copyright laws, and may not be reproduced, republished, distributed, transmitted, displayed, broadcast or otherwise exploited in any manner without the express prior written permission of Brendan Trotter. You may make one copy of this web page for your personal and non-commercial use only, without altering or removing this copyright notice or any other notice.


This file defines bit positions for CPU features that are only needed by kernels.

 9: ;Miscellaneous
10: 
11: %define CPU_KERN_FEATURE_CPUID            0           ;CPUID Instruction
12: %define CPU_KERN_FEATURE_CPUIDcloak       1           ;CPUID Instruction Cloaking
13: %define CPU_KERN_FEATURE_MSR              2           ;Model Specific Registers, RDMSR, WRMSR
14: %define CPU_KERN_FEATURE_MONITOR          3           ;MONITOR and MWAIT supported at CPL=0
15: %define CPU_KERN_FEATURE_xTPR             4           ;xTPR Update Control
16: %define CPU_KERN_FEATURE_AltMovCr8        5           ;LOCK MOV CR0 means MOV CR8
17: %define CPU_KERN_FEATURE_LM               6           ;Long Mode
18: %define CPU_KERN_FEATURE_FFXSR            7           ;FXSAVE and FXRSTOR instruction optimizations
19: %define CPU_KERN_FEATURE_XSAVE            8           ;XSAVE/XSTOR States
20: 
21: 
22: ;Caching
23: 
24: %define CPU_KERN_FEATURE_MTRR             16          ;Memory Type Range Registers
25: %define CPU_KERN_FEATURE_PAT              17          ;Page Attribute Table
26: %define CPU_KERN_FEATURE_DCA              18          ;Direct Cache Access
27: %define CPU_KERN_FEATURE_SS               19          ;Self Snoop
28: %define CPU_KERN_FEATURE_CNXT_ID          20          ;L1 Context ID
29: 
30: 
31: ;Paging
32: 
33: %define CPU_KERN_FEATURE_PSE              32          ;Page Size Extension
34: %define CPU_KERN_FEATURE_PAE              33          ;Physical Address Extensions
35: %define CPU_KERN_FEATURE_PGE              34          ;Page Global Enable
36: %define CPU_KERN_FEATURE_PSE36            35          ;36-bit Page Size Extension
37: %define CPU_KERN_FEATURE_NX               36          ;No Execute/Execution Disable
38: %define CPU_KERN_FEATURE_PAGE_1GiB        37          ;1 GiB large page support
39: 
40: ;APIC
41: 
42: %define CPU_KERN_FEATURE_APIC             48          ;On-chip Local APIC
43: %define CPU_KERN_FEATURE_extAPIC          49          ;Extended APIC space
44: %define CPU_KERN_FEATURE_x2APIC           50          ;x2APIC Support
45: 
46: ;Debugging and Performance Monitoring
47: 
48: %define CPU_KERN_FEATURE_TSC              64          ;Time Stamp Counter
49: %define CPU_KERN_FEATURE_TSCinvariance    65          ;Time Stamp Counter is always fixed frequency (in all ACPI states, etc)
50: %define CPU_KERN_FEATURE_RDTSCP           67          ;RDTSCP instruction
51: %define CPU_KERN_FEATURE_DE               68          ;Debugging Extension
52: %define CPU_KERN_FEATURE_DS               69          ;Debug Store
53: %define CPU_KERN_FEATURE_DTES64           70          ;64-bit Debug Store
54: %define CPU_KERN_FEATURE_DS_CPL           71          ;CPL Qualified Debug Store
55: %define CPU_KERN_FEATURE_PDCM             72          ;Perfmon and Debug Capability
56: %define CPU_KERN_FEATURE_APERF            73          ;Architectural Performance Monitor
57: %define CPU_KERN_FEATURE_IBS              74          ;Instruction Based Sampling
58: 
59: ;Virtual Machines
60: 
61: %define CPU_KERN_FEATURE_VME              80          ;Virtual Mode Extensions
62: %define CPU_KERN_FEATURE_VMX              81          ;Virtual Machine Extensions
63: %define CPU_KERN_FEATURE_SVM              82          ;Secure Virtual Machine
64: 
65: ;Reliability
66: 
67: %define CPU_KERN_FEATURE_MCE              96          ;Machine Check Exception
68: %define CPU_KERN_FEATURE_MCA              97          ;Machine Check Architecture
69: %define CPU_KERN_FEATURE_WD               98          ;Watch Dog Time Support
70: %define CPU_KERN_FEATURE_SMX              99          ;Safer Mode Extensions (Trusted Execution Technology)
71: %define CPU_KERN_FEATURE_SKINIT           100         ;SKINIT and STGI


Power Management

These flags are CPU specific.

79: ;Intel Power management
80: 
81: %define CPU_KERN_FEATURE_INTEL_ACPI       0           ;Thermal Monitor and Software Controlled Clock Facilities
82: %define CPU_KERN_FEATURE_INTEL_TM         1           ;Thermal Monitor
83: %define CPU_KERN_FEATURE_INTEL_PBE        2           ;Pending Break Enable
84: %define CPU_KERN_FEATURE_INTEL_EST        3           ;Enhanced SpeedStep Technology
85: %define CPU_KERN_FEATURE_INTEL_TM2        4           ;Thermal Monitor 2
86: %define CPU_KERN_FEATURE_INTEL_TURBO      5           ;Turbo Boost Technology
87: %define CPU_KERN_FEATURE_INTEL_DTEMP      6           ;Digital Thermal Sensor Capability
88: 
89: ;AMD Power management
90: 
91: %define CPU_KERN_FEATURE_AMD_HWPSTATE     0           ;Hardware P-State Control
92: %define CPU_KERN_FEATURE_AMD_100MHzSTEPS  1           ;100 Mhz multiplier control
93: %define CPU_KERN_FEATURE_AMD_STC          2           ;Software Thermal Control
94: %define CPU_KERN_FEATURE_AMD_HTC          3           ;Hardware Thermal Control
95: %define CPU_KERN_FEATURE_AMD_TTP          4           ;Thermal Trip
96: %define CPU_KERN_FEATURE_AMD_VID          5           ;Voltage ID Control
97: %define CPU_KERN_FEATURE_AMD_FID          6           ;Frequency ID Control
98: %define CPU_KERN_FEATURE_AMD_TS           7           ;Thermal Sensor

Generated on Sat Oct 31 21:25:54 2009